Over the years, advancements have been made in microelectronic integrated circuit fabrication technology which has enabled the sizes of circuit devices to be progressively reduced in order that more and more devices can be positioned on a single integrated circuit chip. Despite these advancements, some devices are easier to reduce to smaller sizes than others. For example, although logic devices went to a lower voltage before memory device, memory devices generally are now being reduced to a smaller size at a substantially faster rate than many logic devices which often interface with or connect to the memory devices.
Many types of logic devices, such as Transistor--Transistor Logic ("TTL") devices, are conventionally powered by a five (5) volt supply or power supply. Nevertheless, problems can be encountered when memory devices which interface with the logic devices are attempted to be powered with a 5 volt power supply. For example, because memory devices often have smaller feature sizes, a 5 volt signal applied to such a device can destroy the device, e.g. causing the gate oxide to break down.
For this and other reasons, logic devices, memory, and other integrated circuit devices have slowly migrated from conventional 5 volt designs to lower voltage designs such as 3.3 volts. Interfacing various components and systems with different voltage tolerances has become an important design issue that has needed to be and continues to need to be addressed. For example, low voltage memory devices still need to interface with or be connected to logic devices, such as TTL devices, and other devices that still operate at 5 volts. These devices often need to be connected to a common input/output ("I/O") line.
Memory devices which operate on 3.3 volts are often capable of driving 5 volt logic devices. Such a memory device is provided with a tri-state output driver or driving circuit that selectively operates in a normal drive mode, and also in a tri-state or high impedance mode in which the driver is somewhat transparent to the output line to which it is connected. If protection is not designed into the circuit, a 5 volt logic signal applied to the input line to which a 3.3 volt tri-state driver is connected can destroy the driver, e.g., due to the break down of the gate oxide.
Attempts have been made to design I/O buffers or buffering circuits which tolerate a 5 volt input. Examples of such attempts can be seen in U.S. Pat. No. 5,546,019 by Liao titled "CMOS I/O Circuit With 3.3 Volt Output And Tolerance Of 5 Volt Input," U.S. Pat. No. 5,450,025 by Shay titled "Tristate Driver For Interfacing To A Bus Subject To Overvoltage Conditions," and U.S. Pat. No. 5,467,031 by Nguyen et al. titled "3.3 Volt CMOS Tri-State Driver Circuit Capable Of Driving Common 5 Volt Line." These attempts, however, can be complex, expensive, and less effective in protecting an output driver from destruction. Additionally, these prior attempt can be less effective in inhibiting or preventing unwanted current draw or flow, e.g., leakage current, from the output terminal during tri-state conditions and can load other output drivers in a network during tri-state conditions.